The present invention generally relates to a semiconductor device and a method of manufacturing the same. In particular, the invention concerns a semiconductor device incorporating polycrystalline silicon interconnections and a manufacturing method thereof.
In recent years, there arises an increasing tendency of using polycrystalline silicon in the semiconductor integrated circuit device for meeting the demand for implementation of high-speed semiconductor devices with high integration density. In particular, in the case of a MOSLSI in which insulated gate field effect transistors (IGFETs) are employed, there is obtained an advantage that the gate electrode of the IGFET and the interconnection layer can b formed of a same polycrystalline silicon layer. Besides, by selectively doping a polycrystalline silicon layer at regions with impurity at a high concentration to exhibit a low resistivity in such a manner that a polycrystalline silicon region of high resistivity is sandwiched therebetween, it is possible to incorporate resistors in the polycrystalline silicon layer. In other words, importance of polycrystalline silicon becomes predominant in the implementation of semiconductor devices and in particular in silicon IC device and silicon LSI device.
Polycrystalline silicon is usually formed through chemical vapor deposition (referred to as CVD in abbreviation), according to which silicon wafers are introduced into a heated quartz tube and supplied with a raw material gas (such as monosilane or the like), to thereby deposit polycrystalline silicon on the wafers. However, this method is accompanied with a problem that oxygen contained in the air may enter the quartz tube together with the wafers upon introducing wafers into the quartz tube, resulting in that exposed regions (contact holes or windows) of the silicon wafer will become oxidized more or less. As a consequence, a thin oxide film is formed between the silicon surface within the contact windows and the polycrystalline silicon film deposited on the silicon surface, whereby contact resistance of the polycrystalline silicon layer is increased, degrading the performance of the semiconductor device. In an extreme case, electric breakage (open-circuiting) will take place between the silicon wafer and the polycrystalline silicon layer, as the result of which yield of the manufactured semiconductor devices is decreased. Increasing the high integration density of the semiconductor LSI requires corresponding reduction of area available for a unit element, being accompanied with reduction in the area of the contact region (window). Under the circumstances, when the polycrystalline silicon layer is to be used for the interconnection in the manner known heretofore, the problem involved in the formation of the polycrystalline silicon layer as described above becomes more serious, providing the cause for the significant increase of the contact resistance as well as degradation of reproducibility (yield) of the contacts.